For some applications, such as digital, analog, radio-frequency (RF) or mixed signal circuits, networks of electrically conductive interconnects or busses may be formed to provide distribution of signals or power for common use within the die. In one example the electrically conductive interconnects provide distribution of power to the circuits or transistors across the die. However, these interconnects may have relatively high resistance because of their relatively small cross-sectional area. High resistance interconnects leads to power loss in the interconnect themselves, which produces undesired heat and reduces the overall efficiency. Furthermore, resistive losses result in a reduction in the interconnect voltage with increasing distance from the voltage source. Circuit or transistor operation may thus be compromised because of a variation in power supply voltage across the die.
Further, electrically conductive interconnects may be used to provide distribution of circuit signals that are commonly used across the die. In one example such interconnects may provide distribution of the clock signal. In addition to the issues discussed above relating to high resistance, when formed on or in relatively close proximity to a conductive substrate or other conductive elements, parasitic capacitive coupling may cause a reduction in the frequency of operation or a variation in the frequency of operation across the die, again degrading performance. Such parasitic capacitive coupling may also occur between interconnects or between interconnects and devices.
Further, regions of a semiconductor substrate may be physically and electrically isolated from each other. For example mixed signal circuits may include both analog and digital circuit components as well as optional power components. Each of these sub-components may require isolated distribution of their own signals and power over independent interconnects. When such signal and/or power lines come within close proximity to each other or other conductive components, or cross each other, interaction may occur between them resulting in reduced frequency of operation and/or compromised circuit performance, for example by cross-talk, where a signal from one interconnect is coupled into the signal from another interconnect.
For simplicity of illustration and ease of understanding, elements in the various figures are not necessarily drawn to scale, unless explicitly so stated. Further, if considered appropriate, reference numerals have been repeated among the figures to indicate corresponding and/or analogous elements. In some instances, well-known methods, procedures, components and circuits have not been described in detail so as not to obscure the present disclosure. The following detailed description is merely exemplary in nature and is not intended to limit the disclosure of this document and uses of the disclosed embodiments. Furthermore, there is no intention that the appended claims be limited by the title, technical field, background, or abstract.